Hardware, Electronics, SiC, GaN, FOC, ACIM/PMSM, ASIC/IC, AFE

Department: HOT USA , ,
Salary: For discussion

RECRUITER SUMMARY

HOT SG Others, Hardware Electronics SiC GaN FOC ACIM/PMSM ASIC/IC AFE, Negotiable Salary

31/03/2026

Candidate Background

Nationality:
Croatian
Residence:
Konjscina, Croatia
Education:
Advanced Postgraduate Studies in Electronics Master of Science (MSc) in Electronics
Languages:
English – Fluent
Experience:
20+ years of experience in the industry Current & Previous Employers and jobs include: Engineer Fellow at XXXX Senior Engineering Manager at XXXX Engineering Manager at XXXX
Motives:
Is open for opportunities. Open for R&D lead for cross functional team or part of technology fellow position in any countries.
Current Salary:
Expected Salary:
For discussion
Notice Period:
1 Month
Interview Availability:
Requires a day of notice

Interview Assessment Notes

1.       Could you introduce yourself and tell us about you? Your current / recent jobs and employers? Previous companies and jobs?

He is an Engineering Fellow and former Senior Engineering Manager at XXXX, where he established the Single Phase UPS Center of Excellence. A veteran of both academia and high-stakes industry, he has led the development of Railway Level Crossing Systems (RLC23) and high-power elevator motor drives (20kW) optimized for reduced EMI and energy recovery. He is currently focused on AI implementations for critical infrastructure, transitioning from managerial roles to technical roadmapping for the next 5–15 years. His expertise covers the entire “V-model” lifecycle—from numerical methods in circuit synthesis to TÜV Rheinland safety certifications and global HCI/Liquid Cooling optimization projects like Titan East with NVIDIA. He treats engineering as a rigorous, cross-functional discipline where hardware and firmware are inseparable. At Alpro, he finalized complex rolling stock and infrastructure products, building an R&D team from the ground up to over 20 engineers (Electrical, Embedded, Mechanical, and Test). He led the complex certification processes with TÜV Rheinland in Cologne, ensuring that mission-critical systems met the world’s most stringent safety integrity levels. He developed a 20kW three-phase motor drive for elevators that redefined efficiency through reduced EMI and a unique energy-storage concept that captures energy typically lost as heat in balanced systems. In Zagreb, he built the specialized team responsible for Single Phase UPS design, overseeing power electronics, mechanical thermal distribution, and modular redundant architectures. He navigated the “logistic nightmares” of a 31,000-employee company, coordinating R&D and prototyping across Columbus, Delaware, Pune, Xi’an, and Monterrey. As an Engineering Fellow (T15/Director level), he currently advises business units on long-term technology trajectories (5, 10, and 15-year plans), focusing on DC microgrids and the future of power distribution. He is a key contributor to the optimization of Liquid Cooling systems in data centers, aiming to drastically reduce the cooling losses that account for a massive portion of data center energy consumption.  He currently experiments with NVIDIA Jetson Nano platforms to implement Edge AI, comparing digital twins with physical-based evaluations to improve real-time device efficiency. He is actively working on improving Bayesian methods and sequential optimization techniques, moving beyond the “AI hype” to find feasible applications in EMI/EMC and thermal management.

2.       What skill(s) / experience would you self-describe as strongest or specialist in?

Strongest skills would be Hardware & Electronics Design, Embedded Software Systems, and Emerging Technologies & Methodologies. He is an expert in SiC (Silicon Carbide) and GaN (Gallium Nitride) converters and planar matrix transformers, driving the industry shift toward ultra-high-efficiency power systems. He is a specialist in Field Oriented Control (FOC) for both AC Induction and Permanent Magnet Synchronous Motors (ACIM/PMSM), optimizing torque and energy recovery in industrial applications. He possesses deep-tier knowledge of ASIC/IC design flows, specifically Analog Front-End (AFE) and SAR ADC architectures, allowing him to optimize systems at the transistor level. He is proficient in Zynq-7000 SoC development using VHDL and Vivado, bridging the gap between flexible FPGA logic and high-speed ARM processing. A veteran of Railway and Industrial safety, he designs systems to the highest Safety Integrity Level (SIL4), navigating the complexities of Real-Time Control on ARM and MIPS architectures. He utilizes C/C++, RTOS, and Bare-Metal development to ensure that software performance is perfectly aligned with the underlying hardware constraints. He employs MIL (Model-in-the-Loop) and HIL (Hardware-in-the-Loop) testing alongside SPICE simulation to validate system behavior before physical deployment. He uses Python-based modeling to create virtual representations of physical assets, allowing for real-time monitoring and the prediction of system failures before they occur. He is actively implementing Machine Learning at the edge, optimizing critical infrastructure by reducing the latency between data capture and intelligent action.

Silicon Valley Associates Recruitment

Hong Kong

907, 9th Floor, Silvercord Tower 2, Tsim Sha Tsui. Kowloon, Hong Kong

China

25F, Central Plaza, Xin Tian Di, Shanghai

Singapore

Ubi TechPark #01-08, Singapore

China

Sunshine Technology & Innovation Centre, No.1003 Nanxin Road, Nanshan, Shenzhen

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